We had decapsulated the A5 a couple of days ago, but as you could see in those early pictures, you can’t tell much of a chip’s layout from the top metal – it’s all power and ground buses. So we have to de-layer the chip down to a level where we can see the block layout of the chip; not an easy thing when there’s nine layers of metal! In fact, these days it’s easier to go in from the back and remove the substrate silicon, and look at the gate level from below. Then we can identify the circuit blocks that make up the full device.
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