January 24, 2012 AT 6:04 am

Choosing the Right Crystal and Caps for your Design

Learning to design your own PCBs and being able to put together a schematic to solve a specific problem is both a valuable and rewarding skill.  There are a number of resources out there to help you avoid common mistakes, but it isn’t always obvious to know where the values of certain common components come from, particularly common parts like resistors and capacitors.  Figuring this out is part of the learning process, but it isn’t always easy to know where to look since you first need to know exactly the right terms to search for.

One good example that I haven’t seen a lot of attention paid to is deciding which crystal to use for your board and which caps go with it. Most people just copy and paste what they found on some other schematic (“12MHz + 22pF? … sounds good!”).   Unfortunately, if you want to get accurate and stable results out of the crystal, you need to match the capacitors to the specific crystal you chose, and it varies from model to model even with the same manufacturer.   Fortunately, it’s trivial to calculate the right capacitors for your crystal.

A 12MHz crystal that I use quite a bit is the NX3225SA-12.000000MHZ from NDK.  It’s a good size, stable (+/-15 ppm), and easy to find.  I use the more expensive +/-15 ppm model for better input to the PLL, but if you don’t use the right capacitors along with the crystal your signal will never be anything remotely close to +/-15ppm and you may as well buy a much cheaper crystal.

So how do you know which capacitors to use?  Easy.  Every crystal datasheet lists something called the Load Capacitance (CL).  In the case of the crystal above, it’s 8 pF.  C1 and C2 need to match this Load Capacitance, with the following formula being the key:

CL = (C1 * C2) / (C1 + C2) + Cstray

C1 and C2 are the two capacitors that you see attached to the crystal, but you might be wondering what Cstray is.  Unfortunately, every trace, every lead on your component, just about everything on your PCB has some stray capacitance.  The total of these values is represented by Cstray.  You can usually guestimate this in the neighbourhood of 2-5pF as long as you follow good layout practice and keep the trace from the crystal to the pins on the MCU as short as possible with no vias, etc.

We know CL since it’s stated in the crystal datasheet (8 pF), and we know Cstray (say ~5 pF), so all we need to do is test our value for C1 and C2 to make sure that it will match CL taking into account Cstray.  A commonly tossed around rule of thumb is to start with a pair of capacitors two times the CL of the crystal, which will get you to CL.  In this case, that would be 2*8 pF = 16pF for the capacitors.  Unfortunately, this ignores the stray capacitance (Cstray), and won’t give you the best results.  Even if you are guestimating Cstray you will get better results taking it into account, but it means just using a capacitor 2* CL won’t work:

CL = 8 pF
C1, C2 = 16 pF
Cstray = 5pF

(16 pF * 16 pF)/(16 pF + 16 pF) + 5 pF= 13 pF

13pF is much too high to get the best results from your crystal.  If instead of 16pF, we take a lower 6 pF value this will give much better results:

(6pF * 6pF)/(6 pF + 6 pF) + 5 pF =8 pF

If you think the stray capacitance is a bit lower, say 3pF, you might try a 10pF capacitor:

(10 pF * 10 pF)/(10 pF + 10 pF) + 3 pF = 8pF

There’s an obvious tradeoff between choosing a standard capacitor value, and having a good idea of what your Cstray is, but the above formula should at least explain HOW to determine what value those capacitors should be relative to your crystal.  Even using a ballpark Cstray plud good layout should give you far more accurate results than just copying and pasting a value you saw on another schematic unless you’re using the exact same crystal model (which is unlikely since they are rarely even listed in the schematic).

A better rule of thumb is: C1, C2 = 2*CL – 2*Cstray

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  1. mikeselectricstuff

    A handy tip I got from a Microchip guy a while ago is that a ‘happy’ oscillator has a similar amplitude on each side of the crystal. You ideally need to use a low capacitance probe (e.g. x100) to avoid the probe affecting things too much.

  2. This is very helpful information. Thank you.

  3. I have a further question – don’t you have to take the parasitic input capacity of the pins of the driven chip into account aswell?

  4. Georg: That would be included in the stray capacitance … it’s basically a sum of everything between the output of the crystal and the input to the PLL inside the chip, including the parasitic capacitance of any pins or leads on any discrete components, etc. You can look in the datasheets to add all the little bits up, but ~5pF is a pretty good rule of thumb.

  5. thanks for this Information – i also found out that quite a number of datasheets don’t give information about the capacity of the XIN Pins ..

  6. GEorg: It’s true that datasheets aren’t always terribly exhaustive, but you can usually find something close to what you want. I used the LPC1343 a lot (an inexpensive 72MHz ARM Cortex M3 chip from NXP), and they don’t list the input capacitance for the XTAL in/out pins — only ADC inputs are listed at 20pF — but if you look at Table 21 of section 11.2 (XTAL Input) you can at least see a table showing suggested values. Using a 12MHz crystal (which is more or less the de facto crystal for LPC MCUs), they show suggested values for a 10pF or 20pF crystal. If this is all the information you have and accuracy is very important, you’ll be better off picking a 10pF cap instead of the 8pF mentionned above, and then using their suggestion of two 18pF capacitors. You can work backwards of course to guestimate the input capacitance with those values. Or … you can also drop the companies a line if it’s important since someone almost certainly (should!) know this information, though it can be hard to get through the corporate firewall if you don’t know someone inside the company already.

  7. GEorg:

    Here’s a better example for the LPC1850 another ARM Cortex M3 MCU I’ve been using lately. In this datasheet they list the input capacitance of the XTAL pins as max 0.8pF (search for Cio p.96 of the 21 Nov 2011 DS):


    This is only a simulated value in this case (see note 14) but it should give you a pretty close approximation.

    You still need to add in some margin for stray capacitance due to the trace, parasitic capacitance of the capacitors (use smaller physical packages if possible), but honestly just using the rule of thumb above and guessing 2-5pF will already give you far better results that just copying the capacitor values you saw on some other schematic.


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