This made the rounds a month or so back, but NXP was kind enough to send me a handful of LPC1114 samples in the new DIP package to play with.  I’m already a pretty big fan of the QFP and QFN versions of this chip (LPC1114-based 802.15.4 Wireless Transceiver, etc.), and it also exists in a ridiculously small 2x2mm package, but DIP still holds a special place in my heart.  The new package is clearly targeting the Chinese market where a lot of low cost goods are still assembled by hand using PTH parts, but it’s a nice little bonus for the hobbiest community as well.  

While the smaller pin count necessitates a reduction in peripherals compared to the QFP48 chips, it still has the same internals as any other member of the LPC1114 family, and covers pretty much every peripheral or serial bus you’d expect to find in something aiming to be an 8-bit killer (coincidentally, DIP packaging may be the last nail in the coffin of 8-bit from a commercial point of view, now that you have such capable 32-bit offerings available for under $1, that beat 8-bit in almost every category from price, power, performance, etc.?)*:

• 50 MHz
• 32KB Flash
• 8KB SRAM
• SPI
• I2C
• USART
• 10-bit ADC
• 1×16-bit timer
• 2×32-bit timers

I’l update the LPC1114 Code Base to support this new package, and try to put together a simple parts list to do a breadboard circuit with this chip (how many other 32-bit ARM MCUs can you do that with, I ask?), but you can definately expect to see a bit more of this chip in the coming weeks as I try to find some hands-on time to play with it.  For the moment, I just wanted to post a quick photo to show that they’re indeed real, on my desk, and begging for a free afternoon to get them up and running, doing something fun.

In a related note, ARM announced the new Cortex M0+ today.  While actual silicon won’t be available from NXP until later this year, it’s a nice improvement on an already great little core.  The biggest advantage to me is single-cycle IO — the current M0 takes two cycles because of the Von Neumann architecture with a single channel for data and instructions, versus the three-channel Cortex M3 — though there are a number of other nice little updates.

* Obligatory warning: The opinions expressed in this caustic and inflammatory remark are purely those of the author, and not those of Adafruit Industries 🙂