While I rarely work with signals much beyond 100MHz (SDRAM, etc., usually being the limit), it never hurts to try to improve your understanding of high speed layout. By far the best book you can buy on the subject is High Speed Digital Design: A Handbook of Black Magic by Howard Johnson and Martin Graham. That said, I found myself routing some USB signals that I wanted to have matched since the USB connection is high speed, and after routing the board I took a look around to see what advice I could find before signing off on that part of the board. There are some excellent replies over on stackexchange to “How should I lay out timing matched traces“, with a valuable reminder to step back and consider the scale of your board, and that 1mm length on your PCB probably equals about 5 picoseconds in reality!. Sometimes is helps to just zoom out, look at something at life size, and realize how small that little green board really is! The other good source of information I found was Board Design Guidelines for PCI Express Architecture. Some very good tips on layout and real-world technical considerations that aren’t always cleared explained in more academic texts. Any suggestions yourself? Feel free to post them in the comments below. I’m as happy to find new sources of expert advice as anyone!
As a sidenote, the new Meander tool in Eagle 6 is very useful for this. You can use it to click on a trace and it will tell you the exact length, which makes it much easier than having to type ‘run length-freq-ri.ulp’ in Eagle 5 and try to find your trace in the other 300 listed by name!
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