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May 11, 2016 AT 1:55 pm

Defining a Homemade CPU’s Instruction Set Architecture, Decoder, & RAM

If you happen to be designing your own CPU, you might be interested to study the work done by those before you. In this post by Colin “Domipheus” Riley topics such as ISA, Decoders, and RAM and tackled; this is part 3 in an ongoing blog series that is now nearly 1 year old.

forms_bits_organization

decoder

This is a 16 bit machine, and I want to keep things simple. To that end, we use a fixed instruction length. Each instruction will always be 16 bits long, regardless of what it does. This allows our instruction decoder to be much simpler. However, fitting all the information we need into an instruction may be difficult. In the last part, I mentioned we have a register set comprising of 8 16-bit registers, meaning we need 3 bits to address one. I’ve not decided to have any of the registers special, like r0 always being zero. All are addressable.

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