I’ve uploaded my IP-free Verilog FPGA DisplayPort Implementation to a new Github repo. Feel free to take a look around, and try it on your board. My Verilog skills are weak, so any help would be greatly received.
A open Verilog implementation of DisplayPort protocol for FPGAs
DisplayPort is quite a complex protocol. This is a minimal Verilog implementation in the Verilog Language. Hopefully this will inspire others to improve on this.
This early version support a single lane (2.7Gb/s) and displays a white 800×600 screen, can scale to support four lanes and 4k resolutions.
My own test board is a Digilent Inc Nexys Video, using an Xilinx Artix 7 FPGA. However the most of the hardware specific parts are limited to the transceivers which can be replaced to support FPGAs from other vendors.
Stop breadboarding and soldering – start making immediately! Adafruit’s Circuit Playground is jam-packed with LEDs, sensors, buttons, alligator clip pads and more. Build projects with Circuit Playground in a few minutes with the drag-and-drop MakeCode programming site, learn computer science using the CS Discoveries class on code.org, jump into CircuitPython to learn Python and hardware together, TinyGO, or even use the Arduino IDE. Circuit Playground Express is the newest and best Circuit Playground board, with support for CircuitPython, MakeCode, and Arduino. It has a powerful processor, 10 NeoPixels, mini speaker, InfraRed receive and transmit, two buttons, a switch, 14 alligator clip pads, and lots of sensors: capacitive touch, IR proximity, temperature, light, motion and sound. A whole wide world of electronics and coding is waiting for you, and it fits in the palm of your hand.
Have an amazing project to share? The Electronics Show and Tell is every Wednesday at 7pm ET! To join, head over to YouTube and check out the show’s live chat – we’ll post the link there.
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