The most recent ESP newsletter arrived as we were finishing the Python on Hardware newsletter, here’s a link and more about the new ESP32-S2! AND a datasheet! – PDF. Also saw a 56 pin ESP32-S2 – Twitter …
ESP32-S2 is a low-power 2.4 GHz Wi-Fi System-on-Chip (SoC) solution. With its state-of-the-art power and RF performance, this SoC is an ideal choice for a wide variety of application scenarios relating to the Internet of Things (IoT), wearable electronics and Smart Home. ESP32-S2 includes a Wi-Fi subsystem that integrates a Wi-Fi MAC, Wi-Fi radio and baseband, RF switch, RF balun, power amplifier, low noise amplifier (LNA), etc. Espressif’s new SoC is fully compliant with the IEEE 802.11b/g/n protocol and offers a complete Wi-Fi solution. At the core of this SoC is an Xtensa® 32-bit LX7 CPU that operates at a maximum of 240 MHz. The SoC supports application development, without the need for a host MCU.
The on-chip memory includes 320 KB SRAM and 128 KB ROM. It also supports a number of external SPI/QSPI/OSPI flash and SRAM chips for more memory space. With its multiple low-power modes, ESP32-S2 is designed for ultra-low-power performance. Its fine-grained clock gating, dynamic voltage and frequency scaling, as well as the adjustable output of its power amplifier contribute to an optimal trade-off between communication range, data rate and power consumption.
The device provides a rich set of peripheral interfaces, including SPI, I2S, UART, I2C, LED PWM, LCD, camera, ADC, DAC, touch sensor, temperature sensor, as well as 43 GPIOs.
It also includes a full-speed USB On-The-Go (OTG) interface which enables USB communication at all times.
ESP32-S2 has several dedicated hardware security features. Cryptographic accelerators are integrated, thus providing AES, SHA and RSA algorithms. Additional hardware security features are provided by the RNG, HMAC and Digital Signature modules, as well as flash encryption and secure boot signature verification. These characteristics allow the device to meet stringent security requirements.