Now in my new design when the CPU fetches and decodes an instruction that needs an operand (some data or an address where it can find the data), it interprets the next address in memory as data, not an instruction. It does this by reading its contents and increasing the program step counter by 2 instead of by 1.
Now we have 5 whole bits to encode instructions, we can have not 4 but 31 instructions. Strictly speaking we could have 32, but I decided to treat myself and make 00000 a no operation opcode, an instruction that does nothing.
See this interesting dive into hardware programming via MakeCode on the micro:bit.
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