Three fundamental flaws of SIMD #Firmware #Microprocessors
SIMD refers to a computer architecture that can process multiple data streams with a single instruction (i.e. “Single Instruction stream, Multiple Data streams”). A post on Bits’n’Bytes refers to the type of SIMD that is most common in contemporary consumer grade instruction set architectures, and which most people think about when they hear the term “SIMD”: packed SIMD.
The common trait of packed SIMD architectures is that several data elements are packed into a single register of a fixed width. (Above) is an example of possible configurations of a packed 128 bits wide SIMD register.
For instance, a 128-bit register can hold sixteen integer bytes or four single precision floating-point values.
This type of SIMD architecture has been wildly popular since the mid 1990s, and some packed SIMD ISA:s are:
The promise of all those ISA:s is increased data processing performance, since each instruction executes several operations in parallel. However, there are problems with this model.
The article discusses three flaws with packed SIMD and alternatives.
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