Jergen posts about a re-implementation of the classic 65C02 microprocessor, found in many classic computers, in an FPGA, in a pin-compatible format that lets you upgrade those old computers and games to a 100 MHz clock rate!

The 6502 was the CPU in my first computer (an Apple II plus), as well as many other popular home computers of the late 1970s and 80s. It lived on well into the 1990s in game consoles and chess computers, mostly in its updated “65C02” CMOS version. Here’s a re-implementation of the 65C02 in an FPGA, in a pin-compatible format that lets you upgrade those old computers and games to 100 MHz clock rate!

The idea of implementing a CPU core inside an FPGA is not new. In fact, the CPU core used was developed as a 6502 core by Arlet Ottens, and extended to cover the 65C02 opcodes by Ed Spittles and David Banks.

I packaged this in a Spartan-6 FPGA (with 64 kByte on-chip RAM), on a small circuit board which is just the size of a 40-pin dual inline package, with pins matching the 65C02 pinout. I added logic inside the FPGA which can access the external 65C02 bus with the correct timing, based on whatever clock is coming in from the host system. Inside the FPGA, the CPU core runs at 100 MHz. I dubbed this the “65F02”, where the “F” might stand for FPGA or for “Fast”. 😉

The idea is to use this as a “universal” accelerator for 6502 and 65C02-based host computers – just plug it into the CPU socket. The only thing the FPGA board needs to know about its host is the memory map: Where does the host have memory-mapped I/O? Up to 16 different memory maps can be stored in the FPGA, and selected via a mini DIP switch. Upon power-on, the 65F02 grabs the complete RAM and ROM content from the host and copies it into the on-chip RAM, except for the I/O area. Then the CPU gets going, using the internal memory at 100 MHz for all bus accesses except for any I/O addresses – for these, the internal CPU pauses, and an external bus cycle is started at whatever the external clock speed is.

Microcomputers

So far, they are supporting the two 6502-based members of the classic 1977 “Trinity” of home computers – the Apple II and the Commodore PET series. It may be possible and worthwhile to also support some slightly later machines: The Acorn BBC Micro, Atari 400 and 800, and maybe the Commodore C64 come to mind.

• Apple II, including the II plus and europlus, and presumably the //e. Quite a bit of hardware and software trickery by Steve Wozniak, and the older models do not support a real 65C02 – but the 65F02 is a bit more generous in its bus timing and works nicely. The Disk II floppy drive works nicely under DOS 3.3; support for the language card is under development.
• Commodore PET/CBM up to 8032. A very clean and “by the book” design. The same memory map should work for all models from the PET 2001, the 3000 and 4000 series, and the 8000 series up to the 8032. (But excluding the 8096 and beyond, which require memory bank switching.) So far they have tested this on the 8032 only; the 8050 floppy drive works.

Read more in the article here.