since we have the esp32-s2 and esp32-s3 QT Py’s designed, we thought there could be some use for a ‘plain’ ESP32 QT Py. Why, when the S2 and the S3 exist? well, first up the ’32 has BT classic. second, the S3 is still in an intermediate release state. third, while we can get an S2 SoC with built-in PSRAM, S3 doesn’t have it available yet. also, theres hundreds of projects for the ESP32 that already exist that could be implemented here.

this @espressifsystem ESP32 chip is the “pico v3 02′ which is a special fully-integrated ESP32 with passives and crystal already inside and its also STUFFED full of 8 MB Flash and 2 MB PSRAM. it’s a total beast, but still only 7mm QFN56! but omg, this board was a total bear to layout route, maybe 8 hours total.

we definitely had to go with a 4 layer design, 6/6 spacing – and we even had to put a few traces on the inner layer – mostly due to the addition of the CP210x USB serial chip that is essential for easy upload/debug. however, we think we got the pins all set including putting the HSSPI port out on the SPI pins (who doesnt love 80MHz SPI??), and bringing out all DAC and available ADC. only pin that makes me a little nervous is MISO on IO12 since that’s a strapping pin – but it’s also the only exposed fast SPI MISO pin available? so we think it’s worth the risk.